My package named design DDR3 Synchronous Data Random Access Memory by verilog.The memory controller is a digital circuit which manages the flow of data going to and from the computer s main memory.

在DDR3内存控制器一起使用JESD79-3C符合标准SDRAM器件接口。内存类型，如DDR1 SDRAM，DDR2 SDRAM，SDR SDRAM，SBSRAM和异步不支持的回忆。在DDR3内存控制器，SDRAM，可用于程序和数据存储。梯形失真校正设备有一个实例。-Use JESD79-3C standard SDRAM DDR3 memory controller interface devices together. Memory types, such as DDR1 SDRAM, DD

DDR3控制器文档，可参考进行DDR3软件FPGA开发-DDR3 document controller, it can be reference for DDR3 FPGA software development

DDR3控制器文档，可参考进行DDR3软件FPGA开发-DDR3 document controller data sheet2,FPGA development